Vlsi Implementation of High Performance Distributed Arithmetic (da) Based Adaptive Filter with Fast Convergence Factor

The key objective of this paper is to provide an idea for VLSI Implementation of RLS algorithm for noise cancellation with real time analog inputs. In this paper, we present an efficient architecture for the implementation of distributed arithmetic based multiplier less adaptive filter. The throughput rate of update and concurrent implementation of filtering and weightupdate operations. The conventional adder-based shift accumulation for DA-based inner product reduce the sampling period and area complexity. The proposed implementation significantly outperforms the existing implementations in terms of three important key metrics. The least mean squares (LMS) algorithms adjust the filter coefficients to minimize the cost function. Compared to least mean squares (LMS) algorithms adjust the filter coefficients to minimize the cost function. Compared to least mean squares algorithms, the RLS algorithms achieve faster Convergence by variable step size. Proposed RLS algorithm require fewer computational resources and memory than the LMS algorithms. The implementation of the algorithms is less complicated due to DA based approach than the all other existing algorithms. Through MATLAB simulation experiments efficiency of RLS over LMS will be proved. The implementation results show that the proposed algorithm as superior performance in fast convergence rate, low complexity, and has superior performance in noise cancellation.